1. Field of the Invention
The present invention relates to a mask and a method for manufacturing the same, and a semiconductor device. Particularly, the present invention relates to a semiconductor device having a so-called shrink region, and a method for manufacturing the same.
2. Description of the Background Art
From the perspective of suppressing displacement of an overlap position during the process of overlapping and forming different two patterns in the formation of a semiconductor device, a pattern for checking an amount of displacement is sometimes used. This pattern includes a so-called slide caliper pattern disclosed in, for example, Japanese Patent Laying-Open No. 10-335205, Japanese Patent Laying-Open No. 9-17715, Japanese Patent Laying-Open No. 11-145047, and Japanese Patent Laying-Open No. 2008-205312.
In a CMOS (Complementary Metal Oxide Semiconductor) image sensor, for example, it is preferable that, in an effective pixel region where a plurality of pixels are arranged, a light blocking film and the like constituting the plurality of pixels are arranged to be displaced toward a center side of the effective pixel region, as compared with a light blocking film and the like in a region outside the effective pixel region. With such configuration, the light blocking film blocks only the light to be blocked, such as the light that enters a pixel other than a desired pixel, and the effect of suppressing blockage of the light that enters the desired pixel is enhanced. As a result, the efficiency of the light blocking film that blocks the light appropriately is enhanced.
At present, however, there is no established method for indicating, with a high degree of accuracy, a position where the pixel should be arranged in the effective pixel region. It is conceivable to adopt the idea of the slide caliper pattern disclosed in the aforementioned patent documents to control the amount of overlap displacement in the formation of the effective pixel region and the region outside the effective pixel region. However, all of the aforementioned patent documents merely disclose a method for controlling a relative amount of displacement between different two patterns.
Therefore, according to the method disclosed in the aforementioned patent documents, the aforementioned amount of overlap displacement can be controlled with a high degree of accuracy, while it is impossible to check an amount of displacement from a reference position where each of the effective pixel region and the region outside the effective pixel region should be formed. Specifically, for example, when both of two patterns are displaced to have the same phase, this can produce the illusion that processing was performed with a very high degree of overlap accuracy.